The present invention relates to rectifier circuits, in particular those implemented in a CMOS design.
In CMOS circuit design, it is often desirable to have a diode rectifier available. One type of diode functions similarly to a discrete diode with its turn-on voltage and current conduction, but has the disadvantage of being tied to ground. One example is an N+/P-well junction diode. The use of this diode is limited with its terminal tied to a common node, in this case the P-well or P-ground. Another type of diode is a P+/N-well junction diode. This has a similar limitation with the N-well. Furthermore, a P+/N-well diode is really a P+/N/P bipolar device. Unfortunately, these diodes are basically parasitic diodes, and are thus not useful for many circuit design applications.
For a diode that is not connected to ground, the typical approach is to use an MOS transistor with the gate tied to the drain. There are two limitations to this type of a diode. The first limitation is that the turn-on voltage is higher than a diode, and is determined by Vt. This is the MOS threshold, typically 0.8-1.0 volts. In addition, the diode voltage/current relationship is governed by the equation Ids=k(Vdsxe2x88x92Vt)2. This equation reflects that the transistor connected as a diode not only does not turn on until a higher threshold is achieved, but has a more gradually ramped curve for achieving maximum current conduction.
Accordingly, it would be desirable to have a diode rectifier circuit with a low turn-on voltage and maximum current conductance when forward-biased, and that can be inserted between any two nodes.
The present invention provides a rectifier circuit with a transistor having first and second electrodes coupled between an input and output of the rectifier circuit. A latch has an output connected to a control node of the transistor, and has first and second inputs connected to the input and output of the rectifier circuit, respectively. The invention provides a self-contained, self-powered, self-regulated low turn-on voltage diode-rectifier with maximum current (on-state conductance) when forward-biased. This circuit can be inserted between any two nodes and behaves like a Schottky diode.
In one embodiment, the transistor is an MOS transistor and includes self-biased well logic to provide maximum voltage for the well potential. Preferably, the latch is a special comparator that is self-biased, self-regulated, and has minimal DC current consumption. In addition, it is high-speed, with low threshold switching.
In one embodiment, the latch is a comparator having a pair of first and second cross-coupled transistors each having a node, such as a source, connected to the input or output of the rectifier. A threshold reduction circuit is provided to reduce the threshold at the drain of the two cross-coupled transistors. Finally, a second pair of cross-coupled transistors connect between the threshold reduction circuits and ground. The control electrode of one of these second pair of cross-coupled transistors provides the output of the latch. The transistors of the comparator are biased on the verge of turning on, thus providing the low-threshold and high-speed switching. In addition, the configuration ensures that the current passed to ground on both sides of the latch is effectively shut down after switching, minimizing any DC current consumption to a negligible amount.
For a further understanding of the nature and advantages of the invention, reference should be made to the following description taken in conjunction with the accompanying drawings.